Enabling Performance Scaling in a Post-Moore Era
Group Lead & Computer Systems Engineer
Lawrence Berkeley National Labs, USA
Click here for David Donofrio’s presentation slides.
As we approach the end of 2D Lithography scaling we will no longer be able to depend on regular increases in computing performance. While new devices may emerge to augment or supplant traditional CMOS, we must depend on specialized architectures as a means to continue to deliver ever more capable machines. Emerging hardware design tools and methodologies are driving down the cost of hardware development making the deployment of specialized machines realistic. These advanced methodologies combined with the emergence of new FPGA technologies encourage the use of broad arrays of accelerators, each tailored to a subset of applications.
After earning his degree in Computer Engineering at Virginia Tech, David spent several years at Intel in graphics hardware architecture. He is currently a Computer Systems Engineer at Lawrence Berkeley National Labs. His research interests are focused on the design and simulation of future exascale systems with a focus on processor architecture.